The technological roadmap of Parallware is guided by best practices on parallel programming using OpenMP and OpenACC. In order to find the product-market fit we have established long-term collaborations with world-class HPC centers, we have analyzed by hand well-known benchmark suites (e.g., CORAL, NAS Parallel Benchmarks, ORNL’s XRayTrace), and we have setup an Early Access Program to directly collect feedback from users.
The following information is shown hereafter:
- Timeline synchronized with major HPC events ISC and SC.
- Progress in HPC application support, ranging from microbenchmarks and miniapps, up to modules of real HPC codes.
Topic: Experiences in extending Parallware to support OpenACC.
Co-authors Oscar Hernández (ORNL)
ORNL Industrial Partnership Program
TACC Industrial Partnership Program
Parallware Trainer 0.1
Parallware Trainer 0.2
New support for offloading using OpenMP 4.5
New support for multiple compiler suites:Intel ,GNU & PGI
New support for offloading using OpenACC.
New User Action List to support OpenMP/OpenACC-directive parallel templates.
Paper IWOPH’17 @ISC17
Topic: The Technical roadmap of Parallware and its alignment with the OpenPOWER system.
Co-authors:Oscar Hernández (ORNL), Dirk Pleiter (Jüelich).
New support for three implementations of parallel scalar/sparse reductions.
Clang-based reengineering of the Parallware driver and front-end for C/C++.
Topic: Parallware Trainer: Interactive Tool for Experiential Learning of Parallel Programming using OpenMP & OpenACC
Co-authors: Sergio Otega (UMA), Ernesto Guerrero (UMA) and Fernanda Foertter (ORNL).
New Fortran support using FLANG
Improved usability for MPI+X
New support for SIMD execution
New support for tasking
New support for structure data-types
New support for asynchronous execution