We have received very good news these days. Appentra has been selected in the Emerging Technologies track of the Technical Program at SC16.
This means we will be presenting our technology Parallware: A novel LLVM-Based Software Technology for Classification of Scientific Codes to Assist in Parallelization with OpenMP and OpenACC .
Appentra will participate in SC16 Emerging Technologies that consist of carefully selected exhibits and presentations, it will showcase innovative technologies from industry, government labs or initiatives, and academia.
The SC16 Emerging Technologies Committee has selected Parallware as a technology with the potential to influence computing and society as a whole.
Parallware is a new technology for static analysis of programs based on the production-grade LLVM compiler infrastructure. Using a fast, extensible hierarchical classification scheme to address dependence analysis, it discovers parallelism and annotates the source code with the most appropriate OpenMP & OpenACC directives.
Published success stories have already shown the potential of the new technology with microbenchs and with the NAS Parallel Benchmark EP, covering fields such as finite elements, computational electromagnetics and sparse codes.
Thanks to this, we will receive an exhibit floor space in a high visibility location; this location will allow attendees the opportunity to witness our technology demonstrations, see presentations, and hold in-depth technical discussions. We will meet you there.
Parallware tools offer a new parallel programming environment that helps to manage the complexity of developing parallel programs for large HPC facilities. Currently, the portfolio of Parallware tools under construction is: Parallware Trainer, a desktop tool for effective HPC training; and Parallware Assistant, desktop tool for high productivity guided parallelization to simplify the effort of HPC developers.
Our goal is to first present the new tool Parallware Trainer at SC16. Later on, we will develop additional modules for the Parallware Assistant during 2017 so that HPC experts have access to detailed information about their scientific programs, as well as control on the paradigm used to generate parallel code (see to the right “threading”, “offloading”, “SIMD”).
SC16 will bring together the international supercomputing community—a gathering of scientists, engineers, researchers, educators, programmers, system administrators and developers that are unequaled in the world. The internationally recognized technical program will include presentations, papers, informative tutorials, timely research posters and Birds-of-a-Feather sessions. A 515,000 sq.ft. exhibition hall will feature the latest technologies and accomplishments from the world’s leading vendors, research organizations, and universities.
SC16 will take place in Salt Lake City, Utah, EE.UU, November 13-18, 2016. We are delighted to attend to this great event!